Design errors of 5% or less are acceptable, because of resistor tolerances.
Find the base voltage:
Assumption: Base current is so small that it has no effect on the voltage divider.
5% error - > base current is 20 times smaller than the divider current.
Checking the assumption:
Even under the worst case condition the calculation is within the 5% limit, hence the assumption can be done.
Summary of Process and Formulas
HO: What will change if the emitter resistor increases to 2KΩ? (unchanged voltage divider)
VDB Load-Line and Q-Point
- - >
Now we plot these values and get the load line and the Q-point:
The values VCC, RC, R1, and R2 are controlling saturation current and cutoff voltage. To move the Q-point is possible by varying the emitter resistance (RC).
Get the Q-point in the Middle of the Load Line
To set the Q-point is a important preparation as you will see later on.
Effect of RE:
RE too large -- > Q-point moves into cutoff
Q - point in the middle of the load line:
Half the value of IC (sat) and redesign RE
IC (sat) = 2.47 mA ==> 1.23 mA
Look for the nearest standard value:
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